1. Field of the Invention
The present invention relates to semiconductor devices. More specifically, the present invention relates to a semiconductor device that exhibits an increased resistance and reduced leakage current in a reverse-biased state, and a method for manufacturing such a semiconductor device.
2. Background Information
Conventional semiconductor devices include a semiconductor substrate, such as a silicon carbide substrate, onto which an epitaxial layer is deposited. As one example, the semiconductor device may include an N+ silicon carbide substrate onto which an N− type silicon carbide epitaxial layer is deposited. An N− type polycrystalline silicon layer and an N+ type polycrystalline silicon layer are deposited on the surface of the epitaxial layer of the semiconductor substrate and adjoin one another. A gate insulation film located adjacent to a bonded part between the N− type silicone carbide epitaxial layer and the N+ type polycrystalline silicon layer forms a gate electrode. The N− type polycrystalline silicon layer connects to a source electrode and a drain electrode on the rear surface of the N+ type silicon carbide substrate.
The conventional semiconductor device, described above, works as a switch by grounding the source electrode, applying a predetermined positive voltage to the drain electrode and controlling the electric potential of the gate electrode. When the gate electrode is grounded, a reverse bias is applied to the hetero bonding between the N− type polycrystalline silicon layer and the epitaxial layer, and the hetero bonding between the N+ type polycrystalline silicon layer and epitaxial layer and no current passes between the drain electrode and the source electrode. However, when a predetermined positive voltage is applied to the gate electrode, a gate electric voltage is generated on the hetero bonded interface between the N+ type polycrystalline silicon layer and the epitaxial layer and the thickness of the energy barrier which is created by the hetero bonded surface of the interface of the gate insulation film is decreased. Therefore, a current passes between the drain electrode and the source electrode.
When the N− type polycrystalline silicon layer is connected to the N− type silicon carbide layer and a positive voltage is applied to the N− type silicon carbide, a small amount of the electrons inside the N− type polycrystalline silicon layer pass through the energy barrier on the hetero bonded interface. Furthermore, the electrons inside the N− type polycrystalline silicon layer which are energetically excited cut across the energy barrier and flow to the N− type silicon carbide layer. In this way, the electrons inside the N− type polycrystalline silicon layer flow to the N− type silicon carbide layer becoming a leakage current.